Intel’s next generation 10nm Ice Lake-SP Xeon 28 Core / 56 thread CPU benchmarked against AMD’s 7nm EPYC Rome 7742 64 Core CPU
The latest benchmarks of Intel’s next generation Ice Lake-SP Xeon CPU server family have been leaked and they show some interesting results compared to AMD’s current generation 3rd generation EPYC Rome CPUs.
Intel’s next generation 10nm Ice Lake-SP CPUs tested, two chips with 28 cores and 56 threads against a single AMD EPYC Rome 64 Core Flagship
As part of the Whitley platform, the Intel Ice Lake-SP CPU series will consist of several Xeon chips. We have already seen 6 core and 24 core parts, but the latest is a 28 core part and has been noticed by TUM_APISAK in the Geekbench database and Momomo_US also in the SiSoftware database.
The Intel Ice Lake-SP CPU has been tested on a dual-socket server and features two of the chips. Each chip has 28 cores and 56 threads that round up to 56 cores and 112 threads in total. Because the chip is still an early technical example, it has a lower clock speed of 1.5 GHz base and up to 3.20 GHz boost clocks. The CPU has 42 MB L3 and 35 MB L2 cache for a total of 77 MB cache. The 2S Ice Lake-SP server was equipped with 512 GB of memory to be clocked at 3200 MHz and featured in an 8-channel configuration, one of the main highlights of the new Whitley platform.
The performance of the 2S Intel Ice Lake-SP server has been evaluated within Geekbench 4, which does take advantage of the AVX-512 instruction set on Intel’s current and future Xeon CPU families. In single-core tests, the server scored up to 3443 points and in multi-core tests, the chip scored up to 37317 points.
Before comparing it to the AMD EPYC 7742, it should be noted that both test results are based on early technical examples with lower clock speeds, so final performance is expected to be much better. At the same time, the Intel CPUs in this benchmark take advantage of their AVX-512 instruction set that the AMD CPUs lack. The entries are also shown in various operating system environments, although the EPYC 7742 CPU has actually been tested on a Windows 10 server configuration, Geekbench does not report it correctly. Either way, let’s see how the two 28-core Ice Lake-SP Xeon CPUs stack up against a single AMD EPYC 7742 CPU.
We used a single EPYC 7742 entry for comparison so we compare a total of 64 cores and 128 threads from AMD against 56 cores and 112 threads from Intel. The AMD EPYC 7742 CPU easily performs the Intel chips in single-core tests, thanks to the higher clock speeds of 3.4 GHz versus 1.5 GHz on the Intel components. At the same time, the AMD platform delivers approximately 35,000 multi-core points slightly lower than the Intel Ice Lake-SP parts. With the latest clock speeds, the Ice Lake-SP CPUs can easily outperform the AMD EPYC Rome parts, but the lead may not be as great as Intel had hoped.
It clearly seems that Intel’s Ice Lake-SP was more of an EPYC Rome competitor who missed its original schedule due to poor 10nm yields and now has to compete with AMD’s EPYC Milan, which is just around the corner. We’ll be waiting to see some more testing and performance results for Ice Lake-SP CPUs in non-AVX 512 optimized workloads, but any benchmark leak makes it very clear that Ice Lake-SP is late and AMD won’t make things better for Intel .
And it’s just not about performance statistics either, we don’t know Ice Lake-SP pricing and energy efficiency yet, but we do know that the existing EPYC Rome lineup has much lower prices and TCO than the Cascade Lake-SP line and is expected to remain intact even when Ice Lake-SP ships.
Intel Xeon SP families:
|Family branding||Skylake-SP||Cascade Lake-SP / AP||Cooper Lake-SP||Ice Lake-SP||Sapphire Rapids||Granite Rapids|
|Process node||14nm +||14nm ++||14nm ++||10nm +||10nm ++||7nm +?|
|Platform name||Intel Purley||Intel Purley||Intel Cedar Island||Intel Whitley||Intel Eagle Stream||Intel Eagle Stream|
|MCP (Multi-Chip Package) SKUs||No||Yes||No||Yes||TBD||TBD|
|Socket||LGA 3647||LGA 3647|
|LGA 4189||LGA 4189||LGA 4677||LGA 4677|
|Max Core Count||Up to 28||Up to 28|
Up to 48
|Up to 28||Up to 56?||TBD||TBD|
|Max thread count||Up to 56||Up to 56|
Up to 96
|Up to 56||Up to 112?||TBD||TBD|
|Max L3 cache||38.5 MB L3||38.5 MB L3|
66 MB L3
|38.5 MB L3||TBA (1.5 MB per core)||TBD||TBD|
|Memory support||DDR4-2666 6 channel||DDR4-2933 6 channel|
DDR4 2933 12 channel
|Up to 6-channel DDR4-3200||Up to 8-channel DDR4-3200||8-channel DDR5||8-channel DDR5|
|PCIe Gen support||PCIe 3.0 (48 lanes)||PCIe 3.0 (48 lanes)||PCIe 3.0 (48 lanes)||PCIe 4.0 (64 lanes)||PCIe 5.0||PCIe 5.0|
|TDP range||140W-205W||165W-205W||150W-250W||~ 250W- ~ 300W||TBD||TBD|
|3D Xpoint Optane DIMM||N / A||Apache Pass||Barlow Pass||Barlow Pass||Crow Pass||Donahue Pass|
|Contest||AMD EPYC Naples 14nm||AMD EPYC Rome 7nm||AMD EPYC Rome 7nm||AMD EPYC Milan 7nm +||AMD EPYC Genoa ~ 5nm||AMD Next-Gen EPYC (after Genoa)|
Intel Xeon 10nm + Ice Lake-SP family
Intel Ice Lake-SP processors ship later this year and are based on the 10nm + process node. We’ve seen previous slides that say the Ice Lake family would contain up to 28 cores, but the ASUS presentation says it would actually contain up to 38 cores and 76 threads per socket. There are also rumors that indicate up to 56 cores and 112 threads, so we can’t say for sure what the actual core of the new chips will look like.
The main highlight of Ice Lake SP processors is support for PCIe Gen 4 and 8 channel DDR4 memory. The Ice Lake Xeon family is said to provide up to 64 PCIe Gen 4 lanes and support 8-channel DDR4 memory clocked at 3200 MHz (16 DIMM per socket with support for 2nd generation persistent memory). Intel Ice Lake Xeon processors are said to be based on the brand new Sunny Cove core architecture that delivers an 18% IPC improvement over the Skylake core architecture that has been around since 2015.
One thing to note is that Intel’s 10nm for 2020 is an improved node from the original 10nm node that will mark its debut with the Tiger Lake CPUs. It is marked as 10nm + which is exactly what the Ice Lake-SP Xeon line will use. Some of the major upgrades that 10nm will deliver include:
- 2.7x density scaling versus 14 nm
- Self-aligning quad patterns
- Contact via Active Gate
- Cobalt Interconnect (M0, M1)
- 1st generation Foveros 3D stacking
- 2nd generation EMIB
The Intel Ice Lake SP series would compete directly with AMD’s enhanced 7nm-based EPYC Milan series, which will feature the all-new 7nm Zen 3 core architecture, which is confirmed to be one of AMD’s greatest architectural upgrade since the original Zen- core. Expect to see more Intel and NVIDIA based servers in the coming months.