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“A version of Windows for RISC-V is possible”: we speak with Roger Espasa, CEO of Semidynamics

It does not happen every day that Europe launches its own chip. They did it these days with the EPAC1.0, an SoC that stood out for using the RISC-V architecture that poses a fantastic alternative to avoid dependency on ARM or Intel and AMD.

There are several companies and entities involved in the development of this chip, and in Engadget we have had the opportunity to speak with Roger Espasa, CEO of Semidynamics. The company is responsible for the ‘Nibs’ cores with RISC-V architecture that are an integral part of this design, and this engineer has revealed some keys to the present and especially the future of an architecture that is generating an unparalleled expectation in this segment.

EPAC1.0 and the beginning of something potentially very important for Europe

La European Processor Initiative (EPI) es a joint effort of 10 European countries in which 28 partners collaborate “with the aim of helping the European Union to achieve independence from chip technologies and infrastructure in High Performance Computing (HPC)”.

Epac1

The EPAC has several functional units on its 25mm2 die with Global Foundries 22nm photolithographic technology.

The first fruit of this collaboration is the EPAC1.0, a SoC (System-on-a-Chip) based on RISC-V architecture which in recent years has been gaining more and more relevance and has positioned itself as the clear alternative to ARM architecture.

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This chip combines several specialized acceleration technologies for the HPC field. Specifically it contains four four VPUs made up of Nibble cores developed by Semidynamics and a vector processing unit designed by the Barcelona Supercomputing Center and the University of Zagreb.

There are other important components on this chip that other research and academic bodies have been involved in, and the result has been produced with GlobalFoundries’ 22FDX technology to be integrated into an FPGA designed by FORTH, E4, and the University of Zagreb. This is the first step of a design that hopes to go soon to photolithography of 12nm and below, and that will allow to be integrated in supercomputing centers.

Nevertheless the most striking note of this milestone is in the use of the RISC-V architecture. To talk about what this achievement means, we have had the opportunity to chat with Roger Espasa, CEO of Semidynamics, who has explained to us the impact of this architecture and its promising future.

A long background after which came the creation of Semidynamics

Espasa knows what it is talking about: was an engineer at Intel for more than 11 years in which he worked for example in the development of Xeon processors. He would later go on to work for Broadcom on their ARM cores, and also worked for Esperanto Technologies as Chief Architect.

Roger Espasa
Roger Espasa

In 2016 he changed course and founded Semidynamics, a company dedicated to the development of RISC-V kernels essentially oriented to applications of artificial intelligence and atomic learning. Based in Barcelona, ​​Semidinamics has become one of the participants in the European EPI initiative, and this has allowed them to have a clear vision of the present and future of RISC-V architecture.

At Semidynamics “initially we dedicated ourselves to services for third parties and we manufactured a core for Esperanto Technologies and the intellectual property would be theirs”, but later they decided “design our own things“, and there are two clear goals for the future.

The first is “to sell our technology to third parties so they can integrate it into their chips.” The second, not only to design and create those “plans” for other manufacturers, but to become manufacturers themselves.

That, Espasa explained to us, is complex and “capital investment is very high. You have to lower the risk, and for this you have to hire engineers to ensure that everything goes well. The combination of venture capital and bank loans makes this difficult in EuropeWhile in Silicon Valley it is somewhat more feasible. “

The role of Semidynamics in EPAC

In February of this year we were able to speak with Mateo Valero, director of the BSC, and he commented on how RISC-V was the best asset of the European supercomputing centers to become independent from American CPUs.

Espasa was shown “totally agree with that vision“In fact, he confessed to us, Valero was director of his doctoral thesis and they work together on the European project. At BSC they already made a strong commitment to ARM in the past with the Mont Blanc project, but something happened.

This engineer attended the 2nd RISC-V conference and was very surprised. “I was hoping that there would be five elderly people there and I found a room to burst and with very important people stuck there.” It was there when he thought that “this is going to explode”, something that was reinforced with external events such as Brexit and that made the situation with ARM “not look good”.

That was one of the triggers for the BSC to realize that the shots could go that way. The Mont Blanc project was in the background and this center, Espasa confessed, “did a lot of work convincing the EU that RISC-V was the way and putting everything in motion “.

Semidynamics became an integral part of EPI, and went to work on its high-bandwidth ‘Nibs’ core, which stands out especially for its ‘Gazzillion Misses’ technology and of which, for example, there is a good technical description in this presentation (PDF) or in that video inserted at the beginning of this segment of the article in which precisely all its characteristics are discussed in more detail.

Missess
Missess

As Espasa explained to us, at Semidynamics they wanted to differentiate themselves from other RISC-V core designers and in fact compared this technology to Intel’s. “When you don’t find data in the level one (L1) cache, you can ask up to 10 things from the memory system. If you want to order 11, you bother and wait, but that is not enough in supercomputers“.

With their cores they have made “a special design to request between 64 and 128 things to the memory systemThis is important for machine learning, for recommender systems, for cache management systems like Redis or Memcached and also for HPC environments.

Three advantages of RISC-V over ARM

The dominance of ARM architecture especially in the mobile device market is overwhelming, and that is precisely why we wondered what was generating so much excitement in the RISC-V alternative.

Risk V 1
Risk V 1

Espasa told us how there were three fundamental advantages of this architecture over ARM. The first is that “RISC-V is an open system, a lot of people have collaborated in defining the instruction set. “

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From that definition, this engineer told us, “‘a PDF’ comes out, and the big difference is that if you want to make an ARM chip you can ask them to ‘send you the PDF’, but they charge you a fortune“In RISC-V the set of instructions is open, although later the chip does cost money.

The second advantage is the ability to adapt RISC-V to every need. “People want to add their own instructions because there are medical applications or quantum computing applications that, for example, pose different requirements,” explained Espasa.

“RISC-V is intended to say ‘calm down, invent your instruction, add it and voila, we integrate it‘”Years ago that in ARM was very difficult: according to Espasa you could ask for it, but it still took three years to have it ready. In RISC-V that ability to customize is total and much faster, and” that has generated enormous interest. “

Semidynamics
Semidynamics

Semidynamics Offices

The third advantage it does not come directly from RISC-V, but “from the ARM situation”, which is going through a difficult time due to the potential purchase by NVIDIA and Brexit. With RISC-V we have an architecture “Open Source from day one, extensible from day one and that can also help reduce costs”.

For Espasa, that uncertainty with ARM does nothing more than favor RISC-V. “Only with the announcement of the purchase was there a push to RISC-V, so if it is confirmed it is reasonable to think that there will be another push“.

“I see RISC-V entering Android”

The present of this architecture is certainly striking, but his future is even more promising. We asked Roger Espasa about his potential as a real alternative to ARM in the fields that this option dominates today.

Hifive
Hifive

SiFive’s small HiFive Unmatched board is one of the first options for any user to experiment with the RISC-V architecture.

“If we go back in time,” he explained, “the architectures are linked to a software ecosystem. There is no architecture if there is no software ecosystem. The banking ecosystem still lives in IBM’s 360 architecture and is never going to die. “

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The same happens with the x86 architecture, which “is linked to Windows and as long as Windows continues it will be very difficult for that architecture to die.” The situation with ARM is analogous. “It has the great explosion with mobile phones thanks to the fact that it is lighter, has less consumption and is more appropriate in that area.” That is why it has been chosen by Android and iOS for their ecosystems.

However for Espasa “RISC-V is going to cost a bit, but it can break into the Android ecosystem. The reason is that there is a very strong battle for the cost, and I see RSIC-V entering Android. In iOS it is more complicated, but for example I see RISC-V entering very strong in IoT and AI and surely the AI ​​ecosystem will be RISC-V “.

In fact this is the essential approach for Semidynamics. RISC-V architecture will be critical to the artificial intelligence ecosystem, “we believe in it and we are working to offer our solutions.” Still, he clarifies, “RISC-V will coexist with other alternatives for many years.”

“Windows could release RISC-V version”

Our last question was aimed at the inevitable comparison with that interesting irruption of Apple’s M1 chips in desktop computing. The ARM architecture has proven to be a more than valid option not only on mobile devices, but also on PCs and laptops. Can RISC-V aspire to something like this?

The CEO of Semidynamics explained that “I don’t see laptops and desktops going away, I see them coexisting for a long time with tablets and mobiles, and In a cost search, Windows could also release the RISC-V version, perhaps 3-4 years from now“.

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However, the focus of these chips in the short term will be in other fields. For Espasa in 2021 and 2022 “there are going to be a lot of ads in all IoT segments and in artificial intelligence processors. Ads will be seen in the world of ‘application processors’

What Espasa is clear about is that “people are entering RISC-V to diversify, not to concentrate“And of course this Open Source architecture is increasingly popular and recognized. The interest is enormous even by giants like Intel, which this summer was rumored to have the intention of buying SiFive, a leading company in the RISC world- V.